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Course module: 192130240
192130240
Embedded Computer Architectures 1
Course info
Course module192130240
Credits (ECTS)5
Course typeCourse
Language of instructionEnglish
Contact persondr.ir. N. Alachiotis
E-mailn.alachiotis@utwente.nl
Lecturer(s)
Examiner
dr.ir. N. Alachiotis
Contactperson for the course
dr.ir. N. Alachiotis
Examiner
dr.ir. M. Ottavi
Academic year2022
Starting block
1A
Application procedureYou apply via OSIRIS Student
Registration using OSIRISYes
Aims
  • Define characteristics of embedded systems dependent on application domain: efficient (low-power or efficient design methods (compilers)), cost-effective (high volume or low-development costs), small size, real-time requirements
  • Explain the mechanisms behind state-of-the-art architectures for embedded systems
  • Evaluate the features of various computer architectures
  • Select the most suitable embedded architecture for the application at hand
Content
Nowadays, embedded systems are everywhere: in washing machines, microwaves, cameras, et cetera. Embedded systems consist of hardware and software. In this course, we are going to study hardware architectures for embedded systems. There are several characteristics of interest in embedded systems (dependent on the application domain): efficiency (low-power or efficient design methods (compilers)), cost-effectiveness (high volume or low-development costs), safety, security, small size, performance, and real-time requirements.
Embedded Computer Architectures I is about understanding these characteristics and combining them to create efficient hardware architectures. It is a basic course that prepares you for other embedded system courses.

The basic concepts and techniques will be discussed during lectures. Furthermore, there will be two group assignments. The first assignment will focus on I/O handling of an embedded application; each group will develop an interfacing application (read/write on I/O) onto a RISC-V processing device (equivalent to an Arduino board). In the second assignment, the focus will shift to the computational part;  an application will be mapped onto an alternative architecture (e.g., multicore CPU, GPU, FPGA). The performance achieved in the second assignment will be assessed and bottlenecks will be identified.

The following architectures that are useful in bigger hardware architectures will be evaluated: RISC-V Instruction Set Architecture (ISA), superscalar, very long instruction word, explicitly parallel instruction computing, parallel architectures, multiple instruction - multiple data stream, single instruction-multiple data, non-uniform memory access, uniform memory access, system-on-a-chip, on-chip networks, cache coherency protocols, reconfigurable architectures and field-programmable gate arrays.
Participating study
Master Computer Science
Participating study
Master Electrical Engineering
Participating study
Master Embedded Systems
Participating study
Master Internet Science and Technology
Required materials
-
Recommended materials
Book
Digital Design and Computer Architecture, RISC-V Edition - 1st Edition. Print Book & E-Book. ISBN 9780128200643, 9780128200650
Instructional modes
Lecture

Project unsupervised
Presence dutyYes

Self study without assistance
Presence dutyYes

Tests
Exam, Group assignments

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Kies de Nederlandse taal