- Define characteristics of embedded systems dependent on application domain: efficient (low-power or efficient design methods (compilers)), cost-effective (high volume or low-development costs), small size, real-time requirements
- Explain the mechanisms behind state-of-the-art architectures for embedded systems
- Evaluate the features of various computer architectures
- Select the most suitable embedded architecture for the application at hand
Nowadays, embedded systems are everywhere: in washing machines, microwaves, cameras, et cetera. Embedded systems consist of hardware and software. In this course, we are going to study hardware architectures for embedded systems. There are several characteristics of interest in embedded systems (dependent on the application domain): efficiency (low-power or efficient design methods (compilers)), cost-effectiveness (high volume or low-development costs), reliability, fail-safe, small size, performance, and real-time requirements.|
Embedded Computer Architectures I is about understanding these characteristics and combining them to create efficient hardware architectures. It is a basic course that prepares you for other embedded system courses.
The basic concepts and techniques will be discussed during lectures. Furthermore, there will be two group assignments. The first assignment is a contest; each group is given the same application which has to be mapped onto a processing device (e.g., an Arduino) with the aim to realize the fastest implementation. In the second assignment, the same application has to be mapped onto an alternative architecture. The performance achieved in the second assignment has to be assessed and bottlenecks have to be identified.
The following architectures that are useful in bigger hardware architectures will be evaluated: super scalar, very long instruction word, explicitly parallel instruction computing, parallel architectures, multiple instruction - multiple data stream, single instruction-multiple data, non-uniform memory access, uniform memory access, system-on-a-chip, on-chip networks, cache coherency protocols, reconfigurable architectures and field-programmable gate arrays.