The SoC Design for Embedded Systems course consists of two parts.

The first part fully coincides with the HDL-based SoC Design topic of the course System-on-Chip Design (191210750) and covers: register-transfer level digital design with VHDL, simulation and synthesis, partitioning of hardware in data path and control, (manual) architectural synthesis, design for testability, low-power design, systems with a processor, hardware-software co-design, and design verification.

The second part is spent on a larger integration project in which the knowledge and skills learned in the first part are applied. Students with sufficient background in analog electronics can choose an alternative to the integration project and participate in the Mixed-Signal SoC Design topic of the course System-on-Chip Design (191210750) which covers: mixed-signal design basics, power/speed/accuracy trade-offs, noise and mismatch modeling, packaging and parasitics and power efficiency.

Assessment
HDL  assignments
Integration project or mixed-signal assignments
The final grade for the course is the weighted average of the two grades above. An extra requirement is that each of them is 4.5 or higher.