Learn design techniques for mapping signal processing algorithms on hardware and/or software.
This course deals with the topic of finding an optimal implementation for a given algorithm from the field of digital signal processing (DSP) that satisfies some constraints (for example: minimal circuit size for a required execution speed). Knowledge of DSP is not required. When appropriate, background knowledge will be provided on the fly. The implementation problem is considered for several platforms ranging from dedicated (integrated) circuits for a specific type of computation to general-purpose (multi)processor systems. Each platform requires appropriate design methodologies and tools. This course pays attention to several of them as well as theoretical concepts on which they are based: data-flow graphs and transformations, scheduling techniques, (retargetable) compilation, fixed-point optimization, special hardware structures for the efficient implementation of specific DSP computations such as CORDIC, multiplierless filters, FFT, etc.
Models of computation, DSP architectures, software synthesis and code generation, architecture synthesis, (overlapped) scheduling, algorithm transformations, fixed-point design, multiplierless filter design, CORDIC algorithm, polyphase implementation of multirate filters, FFT hardware structures.
The examination consists of series of practical projects of variable size totaling a nominal study load of 100 hours. Grading is based on a total number of 100 points that can be earned, the points being equal to the number of hours of study load. For example: there may be three projects with a study load of 30, 10 and 60 hours respectively, for which 30, 10 and 60 points can be earned. The total number of points divided by 10 determines the "raw grade". After delivering their reports on the projects, the students are invited to defend their work in an oral session. Depending on the quality of the defense, the "raw grade"
can be adjusted by up to plus or minus one point to give the "final grade".