Learn to design a mixed-signal SoC at different levels of hierarchy.
The SoC Design course focuses on design skills necessary for the realization of a System-on-Chip that consists of analog and digital hardware as well as software. Participating chairs are CAES and ICD. The course starts with two parts that each deal with different aspects of SoC design. These parts consist of lectures, hands-on training and practical exercises:
- HDL-Based SoC Design. This part covers register-transfer level digital design with VHDL, simulation and synthesis, partitioning of hardware in data path and control, (manual) architectural synthesis, design for testability, low-power design, systems with a processor, hardware-software co-design, and design verification.
- Mixed-Signal SoC Design. This part deals with mixed-signal design basics, power/speed/accuracy trade-offs, noise and mismatch modeling, packaging and parasitics, analog building blocks and power efficiency.
The course concludes with a project in which the students collaborate in a design project that covers all of the areas above.
The final grade for the course is the weighted average of the three grades above. An extra requirement is that each of them is 4.5 or higher.